Timers are well known and widely used in the data processing field. In general, timers have timer channels which are dedicated to performing input capture or output compare functions. During an input capture function, a timer may be used to capture the time at which an external event occurs. Conversely, during an output compare function, the timer may be used to generate an output signal at programmable intervals. Both the input capture function and the output compare function may be used to generate interrupts in the data processing system.
Timers may also be used to perform a pulse width modulation function. During the pulse width modulation function, a pulse having a preselected width is asserted during a period of time. The preselected width is generally determined by a user of the timer and is represented by a pulse value stored in a first timer channel register used solely for the purpose of performing the pulse width modulation function. Additionally, a second timer channel register is typically required to store a period value in a second timer channel register to indicate the period of time in which the pulse having the preselected width is asserted. Therefore, at least two registers are required to store the pulse value and the period value needed to perform the pulse width modulation function.
In most timers, dedicated circuitry is provided for performing the pulse width modulation function. The dedicated circuitry generally includes a third register for storing a value of the preselected width of the pulse. The contents of the third register are provided to the timer channel register at an appropriate point in time such that no glitches occur even when the width of the pulse is modified. The dedicated circuitry insures that pulses have the preselected width are output without glitches even when the width of the pulse is modified to be either shorter or longer. However, such circuitry requires at least three registers in addition to the control circuitry required to control each of the registers during execution of the pulse width modulation function. A first one of the three registers is required to store a current pulse width value and a second one of the three registers is required to store a period value to indicate the period of time in which the pulse is to be asserted. The third one of the three registers is required to store a next pulse width value which is to be used during the pulse width modulation function. While the use of the three registers insures that no glitches occur and no erroneous pulses are generated, this solution is hardware intensive and may not be possible to implement in data processing systems which emphasize low cost solutions to data processing challenges.
An alternative to the dedicated circuitry for performing the pulse width modulation function is the use of an output compare channel to generate output pulses having the preselected width of the pulse. However, when this alternative approach is used, the output pulses are unbuffered. Because the output pulses are unbuffered, an asynchronous modification of the width of the pulse may result in glitches and an erroneous output. Therefore, a user of a system must allow for such glitches to be output in a data processing system which uses an output compare channel to perform a pulse width modulation function.
Therefore, to implement the pulse width modulation function, a user must choose between costly circuit area intensive designs and less expensive alternatives which generate erroneous outputs when a width of an output pulse is modified.